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entity SlinkInterfaceProvides 32 bit interface to the SLINK. |
The Interface contains a mechanism that ensures that after a reset the StopTransfer signal remains asserted for 3 more clock cycles. If the logic before the SlinkInterface detects the falling edge of the StopTransfer signal and immediately sends data they arrive only 4 clocks after the ldown signal of the slink has been deactivated. This is the required timing for the SLINK specification. In the current implementation the utest port is hold at '0'.
Ports:
| lff | link full flag |
| ldown | link down signal |
| ud | SLINK data bus |
| ureset | SLINK reset input |
| utest | SLINK test input |
| uctrl | SLINK control word input (to be asserted if a control word is to be transferred) |
| uwen | SLINK write enable |
| crtl | user data is control word |
| data | user data input to the interface |
| data_valid | user data valid |
| stopTransfer | at maximum two more words may be written to the link |